CAFC Partially Affirms for VLSI on Infringement But Vacates and Remands for New Trial on Damages
“[T]he Federal Circuit noted that VLSI made a ‘readily identifiable error’ in calculating speed improvements and power-savings benefits using voltage states that do not perform the infringing function.”
On December 4, the U.S. Court of Appeals for the Federal Circuit (CAFC) issued a precedential ruling in the ongoing patent battle between computer chip patent owner VLSI and major chipmaker Intel Corp. While the court affirmed the infringement findings underpinning the bulk of VLSI’s $2.175 billion jury verdict awarded back in March 2021, the panel ordered a retrial of damages award for one of two asserted patents and dismissed the doctrine of equivalents infringement finding for the other patent. The Federal Circuit also found that the district court abused its discretion by denying Intel’s motion for leave to add a license defense to its case.
The Western District of Texas jury verdict for VLSI awarded $1.5 billion in damages for Intel’s infringement of U.S. Patent No. 7523373, Minimum Memory Operating Voltage Technique, and $675 million for Intel’s infringement of U.S. Patent No. 7725759, System and Method of Managing Clock Speed in an Electronic Device. The jury found literal infringement of the ‘373 patent by Intel’s Haswell and Broadwell microprocessors, which store processing core state information prior to entering sleep mode. The jury found the ‘759 patent infringed under the doctrine of equivalents by Intel’s Lake processors that control core frequency based on a workload signal sent to the power control unit (PCU). U.S. District Judge Alan Albright denied Intel’s post-trial motions challenging the infringement findings and damages awards.
‘Design Choice’ Testimony Did Not Establish Insubstantial Technical Differences
The CAFC rejected both arguments raised by Intel to overturn the infringement ruling regarding the ‘373 patent, finding ample record testimony by VLSI’s expert to support that the minimum voltage at which Intel’s processors could continue to store core state info fell within VLSI’s patent claims. The court further noted that a comparison of core voltage rates presented by Intel’s expert could freely be discredited by the jury as the voltage’s compared by Intel’s expert were measured under different critical conditions. As for Intel’s argument that the claims of the ‘373 patent requires a falling past a minimum voltage as a causal trigger for switching voltage sources, the Federal Circuit found that Intel requested no claim construction on this point in the district court.
The Federal Circuit, however, did find merit with Intel’s argument that VLSI’s evidence of equivalency was legally insufficient. Citing several appellate and U.S. Supreme Court rulings on the doctrine of equivalency, especially Warner-Jenkinson Company, Inc. v. Hilton Davis Chemical Company (1996), the Federal Circuit noted three limitations on the doctrine: proof of equivalency must be provided for each limitation instead of the claim as a whole; alleged equivalents must have substantially the same function, way and result of the claimed technology; and the patent owner must provide linking arguments with particularized testimony on the insubstantiality of the differences between the claimed technology and the infringing equivalent.
While VLSI’s evidence of equivalency was limitation-specific, it did not show that a specified core in combination with a core-specific software module performed substantially the same function, in substantially the same way, achieving substantially the same result as the claimed “first master device” providing requests to change clock frequency. During oral arguments in the present appeal, VLSI’s expert witness expressed that any difference between the equivalent core and software module and the claimed first master device was a simple design choice made by an engineer on a schematic drawing. To the Federal Circuit, however, this did not meaningfully address whether the request functions and both the receipt and output functions were physically separated as required by the claims. VLSI’s expert testimony was further weakened by Intel’s evidence that the microprocessor’s PCU and not specified cores for making frequency determinations based on workload information.
Use of Non-Infringing Voltage States in Damages Calculation Leads to New Trial
Intel’s arguments that VLSI employed a flawed damages methodology also led to vacatur of the $1.5 billion damages award for a new retrial. At trial, VLSI’s damages theory followed a hypothetical negotiation approach based upon the incremental value of the claimed technology over non-infringing alternatives. On appeal, the Federal Circuit noted that VLSI made a “readily identifiable error” in calculating speed improvements and power-savings benefits using voltage states that do not perform the infringing function.
The appellate court did not address Intel’s argument that VLSI introduced non-comparable licenses involving prices for sales of sports teams that the jury may have considered during damages. However, the court pointed out that VLSI’s expert provided that data in response to cross-examination by Intel in a line of questioning to which VLSI objected. The Federal Circuit also noted without so ruling that Intel did not persuasively show that VLSI’s damages methodology was improper instead of misapplied.
Finally, the Federal Circuit concluded that Judge Albright abused his discretion in denying Intel’s motion to add a license defense based on a July 2020 acquisition of Finjan Inc. by Fortress Investment Group, which also owned VLSI. According to Intel, this acquisition triggered provisions of a 2012 license agreement between Intel and Finjan granting Intel a license to practice technologies patented by Finjan affiliates under common control. The Federal Circuit found that Intel’s only delay between the Finjan acquisition and its motion was caused by due diligence required by the license agreement. Further, Intel’s motion requested that the license defense be bifurcated and stayed pending resolution of other issues, leading the Federal Circuit to find little risk of prejudice to VLSI.
Image Source: Deposit Photos
Author: siridhata
Image ID: 661393536
Steve Brachmann
Steve Brachmann is a graduate of the University at Buffalo School of Law, having earned his Juris Doctor in May 2022 and served as the President of the Intellectual Property […see more]
